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 Wireless Components
Gain-controlled IF Amplifier TDA6192 Version 2.1
Specification May 2002
CONFIDENTIAL Revision History: Current Version: V1.1, October 2000 Previous Version:target Data Sheet V1.0, April 2000 Page (in previous Version) all div 3-3 ff 5-2 5-4 Page (in current Version) all div 3-3 ff 5-2 5-4 Subjects (major changes since last revision)
version to V1.1, date to October 2000 TDA6192-V in VQFN-20 package DC levels added Thermal resistance TDA6192-T to 230 K/W Current consumption: tbfs replaced
Revision History: Current Version: V1.2, March 2001 Previous Version:target Data Sheet V1.1, October 2000 Page (in previous Version) all 5-2 5-4 Page (in current Version) all 5-2 5-4 Subjects (major changes since last revision)
status to preliminary,version to V1.2, date to March 2001 Footnote ESD-Protection changed Current consumption changed, VREF vs temperature: Tamb changed , IF input voltage: typ value added, Take-over point voltage: typ value added and disable threshold specified, IF AGC voltage deleted Tuner AGC max. slope, Intermodulation, SNR: typ value added, OIP3 added Diagrams added
5-5
5-5 5-7, 5-8, 5-9
Revision History: Current Version: V1.3, April 2001 Previous Version:target Data Sheet V1.2, March 2001 Page (in previous Version) all 3-4 5-4 Page (in current Version) all 3-4 5-4 Subjects (major changes since last revision)
status to preliminary, version to V1.3, date to April 2001 pins 13, 14: DC level corrected Current consumption corrected
Revision History: Current Version: V2.0, February 2002 Previous Version:target Data Sheet V1.3, April 2001 Page (in previous Version) all Page (in current Version) all Subjects (major changes since last revision)
status to final, version to V2.0, date to February 2002
Revision History: Current Version: V2.0, February 2002 4-2, 4-3 5-2 5-5 4-2, 4-3 5-2 5-5 application circuits changed thermal resistance TDA6192-V added noise figure added, output impedance values added
Revision History: Current Version: V2.1, May 2002 Previous Version: Data Sheet V2.0, February 2002 Page (in previous Version) 3-2, 3-3, 3-5, 4-2 Page (in current Version) 3-2, 3-3, 3-5, 4-2 Subjects (major changes since last revision)
pinning of TDA6192-V changed
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Edition 03.99 Published by Infineon Technologies AG Balanstrae 73, 81541 Munchen (c) Infineon Technologies AG 22.05.02. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. The information describes the type of component and shall not be considered as assured characteristics. Terms of delivery and rights to change design reserved. Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies AG is an approved CECC manufacturer. Packing Please use the recycling operators known to you. We can also help you - get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred. Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components1 of the Infineon Technologies AG, may only be used in life-support devices or systems2 with the express written approval of the Infineon Technologies AG. 1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that lifesupport device or system, or to affect its safety or effectiveness of that device or system. 2 Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health of the user may be endangered.
TDA6192
Product Info
Product Info
General Description The TDA6192 is a 5 V gain-controlled Package IF amplifier for digital and analog frontends
Features
s
Input frequency range 30 to 65 MHz Low intermodulation distortion 48 dB AGC range balanced 1 Vpp buffered output Input for gain-control voltage Output for tuner AGC with takeover point adjust Internal low noise reference voltage Full ESD protection
TDA6192-V
s s s s s
s
TDA6192-T
s
Application
s
IF amplifier in DVB-C, DVB-T, ATSC and ISDB-T frontends with direct IF-sampling.
s
IF amplifier in PAL or NTSC frontends
Ordering Information
Type TDA6192-V TDA6192-T Ordering Code Q67037-A1125(tape and reel) Q67037-A1073(tape and reel) Package P-VQFN-20-3 (on request) P-TSSOP-16-1
Wireless Components
Product Info
Specification, May 2002
1
Table of Contents
1 2 2.1 2.2 2.3 2.4 3 3.1 3.2 3.3 3.4 4 4.1 4.2 5 5.1 5.1.1 5.1.2 5.1.3 5.2 5.2.1 5.2.2 5.2.3 5.3 5.3.1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Internal Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 TDA6192-V Evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 TDA6192-T Evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1 Electrical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3 AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4 Electrical Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6 Gain vs. IF AGC voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6 Intermodulation and output IP3 vs. input voltage . . . . . . . . . . . . . . . . 5-7 Signal to noise ratio vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . 5-8 Measurement Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9 Noise Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9
2
Product Description
Contents of this Chapter 2.1 2.2 2.3 2.4 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
TDA6192
Product Description
2.1 General Description
The TDA6192 device combines a gain-controlled amplifier, an output buffer to drive a following channel decoder IC and a delayed tuner AGC with take-over point adjustment. The gain is controlled by an external voltage.
2.2 Features
s s s s s s s s
Input frequency range 30 to 65 MHz Low intermodulation distortion 48 dB AGC range balanced 1 Vpp buffered output Input for gain-control voltage Output for tuner AGC with take-over point adjust Internal low noise reference voltage Full ESD protection
2.3 Application
s
IF amplifier in DVB-C, DVB-T, ATSC and ISDB-T frontends with direct IF- sampling. IF amplifier in PAL or NTSC frontends
s
Wireless Components
2-2
Specification, May 2002
TDA6192
Product Description
2.4 Package Outlines
P-VQFN-20
P-TSSOP-16-1
Wireless Components
2-3
Specification, May 2002
3
Functional Description
Contents of this Chapter 3.1 3.2 3.3 3.4 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Internal Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
TDA6192
Functional Description
3.1 Pin Configuration
TUNAGC
VREF 18
20
19
17
GND
TOP
not connected VCC1 INGND1 IN IN not connected
1 2 3 4 5 6 10 7 8 9
16 15
not connected VCC2 OUTGND1 OUT OUT not connected
TDA6192-V
14 13 12 11
OUTGND2
INGND2
IFAGC
GND
Pin-configVQFN20
Figure 3-1
TDA6192-V, Pin Configuration
TOP TUNAGC VCC1 INGND1 IN IN INGND2 IFAGC
1 2 3 4 5 6 7 8
16 15 14
VREF GND VCC2 OUTGND1 OUT OUT OUTGND2 not connected
TDA6192-T
13 12 11 10 9
PinconfigT
Figure 3-2
TDA6192-T, Pin Configuration
Wireless Components
3-2
Specification, May 2002
TDA6192
Functional Description
3.2 Internal Pin Configuration
Table 3-1 Pin Definition and Function Pin No. TDA 6192-V 1 2 3 4 TDA 6192-T --3 4 5 not connected VCC1 INGND1 IN not connected supply voltage ground Symbol Equivalent I/O-Schematic Average DC voltage
n.a. 5.0 V 0.0 V 3.6 V
4, 5 or 5,6
5
6
IN
3.6 V
6 7 8 9
----7 8
not connected GND INGND2 IFAGC
not connected ground ground
n.a. 0.0 V 0.0 V 0 to 1.8 V
8
--10 11
9 10 ---
not connected OUTGND2 not connected
not connected ground not connected
n.a. 0.0 V n.a.
Wireless Components
3-3
Specification, May 2002
TDA6192
Functional Description
Table3-2 Table 3-3 Table3-4
Table 3-5 Symbol Equivalent I/O-Schematic Average DC voltage
TDA 6192-V 12
TDA 6192-T 11 OUT
3.2 V
13, 14 or 11, 12
13
12
OUT
3.2V
14 15 16 17 18
13 14 --15 16
OUTGND1 VCC2 not connected GND VREF
ground supply voltage not connected ground
0.0 V 5.0 V n.a. 0.0 V 3.6 V
18 or 16
19
1
TOP
0.2 to 1.6 V
19 or 1
20
2
TUNAGC
20 or 2
0.5 to 5 V
Wireless Components
3-4
Specification, May 2002
TDA6192
Functional Description
3.3 Block Diagram
TUNAGC
VREF
20
not connected
19
18
17
not connected
1 2 3 4 Amp 5 6 7
GND
GND
TOP
16 Tuner AGC 15 14 13 Amp 12 11 8
INGND2
VCC1
VCC2
INGND1
OUTGND1
IN
OUT
IN
OUT
not connected
not connected
9
IFAGC
10
OUTGND2
BlockdiagramVQFN20
Figure 3-3
TDA6192-V, Block Diagram
1
TOP
16
VREF
2
TUNAGC
Tuner AGC
15
GND
3
VCC1
14
VCC2
4
INGND1
13
OUTGND1
5
IN
12
OUT
6
IN
Amp
Amp
11
OUT
7
INGND2
10
OUTGND2
8
IFAGC
9
not connected
BlockdiagramT
Figure 3-4
TDA6192-T, Block Diagram
Wireless Components
3-5
Specification, May 2002
TDA6192
Functional Description
3.4 Circuit Description
The TDA6192 device combines an AGC amplifier, an output buffer to drive a following demodulator IC , a delayed tuner AGC with take-over point adjustment, and a low noise reference source VREF. The gain of the AGC amplifier is controlled by an external voltage. VREF is used as a reference for the takeover point adjustment of the tuner AGC voltage. TUNAGC is an open-collector output.
Wireless Components
3-6
Specification, May 2002
4
Applications
Contents of this Chapter 4.1 4.2 TDA6192-V Evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 TDA6192-T Evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
TDA6192
Applications
4.1 TDA6192-V Evaluation board
TOP 100n Tuner AGC 20 1k5 1 19 18
10k
10n
17 16
TDA6192-V
+5V
2
15
+5V
100n
3
14
100n 10n
Input Input Circuit *)
4
13 10n Output 12 ZLoad 5k ~2 10p
5
6 7 8 9
11 10
IFAGC 100n
4n7
SWF
51 1:1 4n7 *) Transformer or SWF
Application Circuit VQFN20
Figure 4-1
TDA6192-V Evaluation board, circuit diagram
Wireless Components
4-2
Specification, May 2002
TDA6192
Applications
4.2 TDA6192-T Evaluation board
TOP
10k
10n 1 16
Tuner AGC 1k5 +5V 100n
2
15
3
TDA6192-T
14
+5V
100n
4
13
100n 10n
Input Input Circuit *)
5
12 10n Output 11 ZLoad 5k ~2 10p
6
7
10
IFAGC
8
9
100n 4n7 SWF
51 1:1 4n7 *) Transformer or SWF
Application Circuit T
Figure 4-2
TDA6192-T Evaluation board, circuit diagram
Wireless Components
4-3
Specification, May 2002
5
Reference
Contents of this Chapter 5.1 5.1.1 5.1.2 5.1.3 5.2 5.2.1 5.2.2 5.2.3 Electrical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3 AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4 Electrical Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6 Gain vs. IF AGC voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6 Intermodulation and output IP3 vs. input voltage . . . . . . . . . . . . . . . . 5-7 Signal to noise ratio vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . 5-8
5.3 Measurement Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9 5.3.1 Noise Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9
Wireless Components
5-1
Specification, May 2002
TDA6192
Reference
5.1 Electrical Data
5.1.1
Absolute Maximum Ratings
WARNING
The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC may result.
Table 5-1 Absolute Maximum Ratings Parameter 1). Symbol Limit Values min Supply voltage Supply voltage difference Ambient temperature TDA6192-V Ambient temperature TDA6192-T Junction temperature Storage temperature Thermal resistance TDA6192-V (junction to ambient) Thermal resistance TDA6192-T (junction to ambient) IF input IF output AGC input Tuner AGC take-over point adjust Tuner AGC output ESD-Protection 2). all pins VESD -2 +2 kV HBM VCC1, VCC2 VCC1,VCC2 TAMB TAMB TJ TS RthJA RthJA VIF/IF IOUT/OUT VIFAGV VTOP VTUNAGC -0.3 -5 -0.3 -0.3 -0.3 -40 -0.3 -0.3 -20 -20 max 6 +0.3 +85 +70 +125 +125 70 230 4 1 VCC1 VCC1 6 V V C C C C K/W K/W V mA V V V Unit Remarks
1).All values are referred to ground (pin), unless stated otherwise. Currents with a positive sign flow into the pin and currents with a negative sign flow out of pin. 2).According to EIA/JESD22-A114-B (HBM incircuit test), as a single device incircuit contact discharge test.
Wireless Components
5-2
Specification, May 2002
TDA6192
Reference
5.1.2
Operating Range
Within the operational range the IC operates as described in the circuit description. The AC / DC characteristic limits are not guaranteed.
Table 5-2 Operating Range Parameter Symbol Limit Values min Supply voltage Frequency range Ambient temperature TDA6192-V Ambient temperature TDA6192-T VCC1, VCC2 f TAMB TAMB 4.5 30 - 20 - 20 max 5.5 65 + 85 + 70 V MHz C C Unit Test Conditions Item
Wireless Components
5-3
Specification, May 2002
TDA6192
Reference
5.1.3
AC/DC Characteristics
AC / DC characteristics involve the spread of values guaranteed in the specified supply voltage and ambient temperature range. Typical characteristics are the median of the production.
Table 5-3 AC/DC Characteristics with TAMB = 25 C, VCC1 = VCC2 = 5 V Symbol min Power supply, reference voltage Current consumption Current consumption Current consumption Reference voltage VREF line regulation VREF load regulation VREF vs temperature ICC1 ICC1 ICC2 VREF VREFLINE VREFLOAD VREFTEMP -30 10 3.3 18 10 9 3.6 3.9 30 30 30 22 12 mA mA mA V mV mV mV VCC1 = V CC2 = 4.5 to 5.5 V IVREF = -0.5 to 0.5 mA TAMB = -20 to 70 C max. gain min. gain Limit Values typ max Unit Test Conditions L Item
AGC amplifier, tuner AGC Static characteristics IF input voltage Take-over point voltage VIF/IF VTOP VTOP Take-over point disable threshold Take-over point current Tuner AGC current ITOP ITUNAGC 0 3.0 2.0 -1 2.5 3.5 2.3 VREF 2 VCC 3.0 1 5 V V V A mA VTOP = 0 V VTUNAGC = 0.5 V, VIFAGC = 1.0 V, VTOP = 1.5 V VTUNAGC = 6 V, VIFAGC = 1.0 V, VTOP = 0.5 V VIFAGC 1.6 V VIFAGC 0.2 V Tuner AGC is enabled Tuner AGC is disabled
Tuner AGC current
ITUNAGC
0
10
A
Dynamic characteristics Voltage gain, see 5.2.1 Gain vs. IF AGC voltage on page 6 G max G min 63 67 19 71 dB dB
Wireless Components
5-4
Specification, May 2002
TDA6192
Reference
Table 5-4 AC/DC Characteristics with TAMB = 25 C, VCC1 = VCC2 = 5 V (continued) Symbol min Maximum IF input level VIF/IF 88 Limit Values typ 92 max 96 dBV min. gain, fIF/IF = 36 MHz (sine), VIFAGC = 0.2 V, VOUT/OUT = 1 Vpp max. gain, fIF/IF = 36 MHz (sine), VIFAGC = 1.6 V, VOUT/OUT = 1 Vpp 2.5 k pF 50 mA/V fIF/IF = 36 MHz, parallel equivalent circuit VIFAGC = 0.9 to 1.1 V, VTOP = 1.0 V, VTUNAGC = 0.5 V VIF/IF = 60 dBV, RLOAD 5 k, CLOAD 1.5 pF, VOUT/OUT = 1 Vpp at fIF/IF = 36 MHz (sine) fIF/IF1 = 37 MHz, fIF/IF2 = 38 MHz, VIF/IF1 = 60 dBV, VIF/IF2 = 60 dBV RLOAD 5 k, CLOAD 10 pF, LLOAD 2 H, VOUT/OUT = 1 Vpp fIF/IF1 = 37 MHz, fIF/IF2 = 38 MHz, VIF/IF1 = 60 dBV, VIF/IF2 = 60 dBV RLOAD 5 k, CLOAD 10 pF, LLOAD 2 H, VOUT/OUT = 1 Vpp fIF/IF = 36 MHz (sine), VIF/IF = 60 dBV, VOUT/OUT = 1 Vpp, BW = 8 MHz max. gain, see 5.3.1 on page 9 fOUT/OUT = 36 MHz, series equivalent circuit Unit Test Conditions L Item
Minimum IF input level
VIF/IF
44
Input impedance
RIF/IF CIF/IF
1.5
2 1.5
Tuner AGC max. slope
ITUNAGC / VIFAGC fL fH
25
36
Low end cutoff frequency (-1 dB) High end cutoff frequency (-1 dB) Intermodulation, see 5.2.2 Intermodulation and output IP3 vs. input voltage on page 7
25 65
MHz MHz
C/IM3
50
56
dBc
Third order output intercept point, see 5.2.2 Intermodulation and output IP3 vs. input voltage on page 7
OIP3
133
dBV
Signal to noise ratio, see 5.2.3 Signal to noise ratio vs. input voltage on page 8 Noise figure Output impedance
SNR
35
43
dB
10 RIF/IF LIF/IF 60 33
12 100
dB nH
Wireless Components
5-5
Specification, May 2002
TDA6192
Reference
5.2 Electrical Diagrams
5.2.1
Gain vs. IF AGC voltage
typical gain vs IFAGC voltage for -20, 20 and 70 degree centigrade 70.0
60.0
50.0
GAIN (dB)
40.0
30.0
20.0
10.0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 IFAGC (V) 1.1 1.2 1.3 1.4 1.5 1.6 1.7
Wireless Components
5-6
Specification, May 2002
TDA6192
Reference
5.2.2
Intermodulation and output IP3 vs. input voltage
IM3 measurement 135.0 60.0
134.0
58.0
133.0 OIP3 (dBuV) C/IM3 (dBc) 132.0
56.0
54.0
131.0
52.0
130.0 40.0 45.0 50.0 55.0 60.0 65.0 70.0 75.0 Vin (dBuV) 80.0 85.0 90.0 95.0 100.0
Wireless Components
5-7
Specification, May 2002
TDA6192
Reference
5.2.3
Signal to noise ratio vs. input voltage
SNR (8MHz), fin=36MHz 60.0
55.0
50.0
45.0 SNR (dB)
40.0
35.0
30.0
25.0 40.0 45.0 50.0 55.0 60.0 65.0 70.0 Vin (dBuV) 75.0 80.0 85.0 90.0 95.0
Wireless Components
5-8
Specification, May 2002
TDA6192
Reference
5.3 Measurement Circuit
5.3.1
Noise Measurement
Transformer 50
TDA6192
Lcomp
SAW* 50 5:1 * e.g. EPCOS X6966 Noise Figure Meter
Noise Figure Meter
NoisM
Wireless Components
5-9
Specification, May 2002


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